Performance Analysis of Asynchronous Hierarchical-Bus Multiprocessor Systems Using Closed Queuing Network Models

This paper presents an analysis for measuring performance of asynchronous packet switched hierarchical and multiplc-bus multiprocessor systems. T h e performance was measured using both the analytical and simulation models. The performance measured from the analytical model was found to be very close to the performance measured from the simulation model. The performance of a hierarchical bus system has been found to be far better than that of an equivalent multiple-bus system for non-uniform memory reference systems. When multiple parallcl buses or high speed buses are used a t the higher Icvcls. a hierarchical bus system becomes as good as a multiplc bus system (with the same number of buses) for gcncral purpose computations, although the cost of the hierarchical bus system is significantly lower than the cost of a multiple bus system.